Referring to FIG. 5A, an interconnection structure, for example, for use in a semiconductor memory device, is illustrated. Four data lines m11, m12, m13 and m14 are disposed as a first metal layer, and four signal lines m35, m36, m37 and m38 are arranged as a third metal layer. The data lines m11 to m14 of the first metal layer are to read/write data from/to memory cells, and the signal lines m35 to m38 of the third metal layer are to transfer a noise-sensitive signal, respectively. It is required that the chip size is reduced for cost when the degree of integrity increases. One interconnection structure to solve this demand is depicted in FIG. 5B. As shown in FIG. 5B, the four data lines m11 to m14 of the first metal layer are disposed so as to be overlapped with the four signal lines m35 to m38 in a vertical direction, respectively. According to the interconnection structure of FIG. 5B, the length occupied by the eight lines can be reduced by half a length occupied by the eight lines of FIG. 5A. However, signal interference between signal lines and data lines is caused in the vertical interconnection structure of FIG. 5B. In a horizontal interconnection structure (refer to FIG. 1A), the signal interference between signal lines (or data lines) is also caused. Therefore, emphasis has been placed on the bus lines which are sensitive to noise and transfer small swing signals. The signal interference between the signals will now be described with reference to following drawings FIGS. 1A, 1B, 2A and 2B.
FIG. 1A is perspective view of interconnection structure illustrating signal interference between two signal lines according to a first prior art. FIG. 1B is a cross-sectional view taken along a dot line a-a' of FIG. 1A.
Referring to FIGS. 1A and 1B, two signal lines 10 and 12 of the same layer are disposed in parallel, and are insulated from each other through insulating substance 14 therebetween. In the case small swing and noise sensitive signals are transmitted through the signal lines 10 and 12, coupling capacitors C1, C2 and C3 formed by the insulating substance 14 between the first and second signal lines 10 and 12 occur as shown in FIGS. 1A and 1B. As a result, one signal transmitted by one signal line can be interfered by the other signal transferred through the other signal line owing to the coupling capacitors C1, C2 and C3. Although not shown in FIG. 1B, it is obvious to ones skilled in the art that plural signal (data) lines are further formed between the insulating layer 14a and a substrate SUB.
FIG. 2A is perspective view of interconnection structure illustrating signal interference between two signal lines according to a second prior art. FIG. 2B is a cross-sectional view taken along a dot line b-b' of FIG. 2B.
In FIGS. 2A and 2B, two signal lines 16 and 18 are respectively disposed on different layers, i.e., one signal line 16 is disposed on a lower insulating layer 20a and the other signal line 18 is disposed on an upper insulating layer 20b, but the signal lines 16 and 18 are overlapped with each other as shown in FIGS. 2A and 2B. Like the first prior art, an interconnection structure according to the second prior art has a problem that the signal interface between the signal lines 16 and 18 vertically disposed as shown in FIG. 2A can be caused through such coupling capacitors C4, C5 and C6 as illustrated in FIGS. 2A and 2B. Although not shown in FIG. 2B, it is obvious to ones skilled in the art that predetermined layers (for example, plural signal (data) lines) are further formed between the insulating layer 20a and the substrate SUB.
As mentioned above, if noise sensitive and small swing signals, for example, digital and analog signals, are transmitted through the two signal lines 10 and 12 only insulated by means of an insulating substance 14 and disposed in parallel as the same layer as depicted in FIG. 1A or 1B, or if they are transmitted through the two signal lines 16 and 18 respectively disposed as different layers and overlapped with the other as illustrated in FIGS. 2A/B, the signals cannot be recognized in the final destination as valid signals because of the signal interference through the coupling capacitors.